The invention relates to a magnetic memory cell, a magnetic memory comprising an inventive magnetic memory cell, a memory circuit for writing a magnetic memory cell, and a method of writing a magnetic memory cell.
Magnetic random access memories (MRAMs) have been proposed due to their non-volatile nature. Unlike dynamic random access memory (DRAM) cells, non-volatile memory cells such as MRAM cells do not require complex circuitry for perpetual electronic refreshing of the stored information.
The first of such MRAMs were based on magnetic multi-layer structures, deposited on a substrate. U.S. Pat. No. 5,343,422, for example, discloses a structure in which two layers of ferromagnetic material are separated by a layer of non-magnetic metallic conducting material. One of the magnetic materials, called the ferromagnetic fixed layer (FMF), has a fixed direction of magnetic moment, e,g., by having a particularly high coercive field or strong unidirectional anisotropy. The other magnetic layer, called the ferromagnetic soft layer (FMS), has a preferred axis for the direction of magnetisation, the so called easy-axis, which is aligned parallel to the magnetic moment of the ferromagnetic fixed layer, The magnetic moment of this ferromagnetic soft layer is free to change direction between parallel and anti-parallel alignment relative to the easy-axis, and as a consequence, also relative to the magnetic moment of the ferromagnetic fixed layer on application of an external magnetic field.
The state of the storage element represents a logical xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d depending on whether the directions of the magnetic moments of the magnetic layers are in parallel or anti-parallel alignment, respectively. Because the resistance of the storage element is different for different mutual orientations of the magnetic moments, the structure acts as a spin valve. It thus allows the sensing of the state of the storage element by measuring the differential resistance xcex94R/R with a current, where xcex94R is the difference in resistance of the storage element for two different states of relative orientation of the magnetic moments, and R is the total resistance of the structure in the lower resistance state.
A switching between these orientations can be achieved by passing write currents in the vicinity of the FMS, usually by using write lines which run past the layered structure on either side. These write currents, which do not pass through the layered structure itself, induce a magnetic field at the location of the FMS which alters the orientation of the FMS, if it is stronger than the coercive field Hc of the FMS.
An alternative is disclosed in U.S. Pat. No. 6,072,718. There, the conducting nonmagnetic spacer layer between the two magnetic layers is replaced by an insulator. The device therefore forms a magnetic tunnel junction (MTJ), where spin polarised electrons tunnel through the insulator.
The cell disclosed in U.S. Pat. No. 6,072,718 is written by simultaneously sending a current through the word and bit line crossing at the location of the cell. Each of these currents causes a magnetic field at the location of the memory cell. As the word lines and the bit lines are perpendicular to each other, the orientations of the magnetic fields caused by the currents at a crossing point of a bit line and a word line are perpendicular, too. One of the two magnetic fields, the so called hard-axis field, extends parallel to the magnetic hard-axis of the ferromagnetic soft layer, while the other one of the magnetic fields, the so called easy-axis field, extends parallel to the magnetic easy-axis of the ferromagnetic soft layer.
In a write process, usually the hard-axis field, which is perpendicular to the magnetic moment of the ferromagnetic soft layer, is applied to the ferromagnetic soft layer in order to move the magnetic moment out of its actual orientation and the easy-axis field is used to set the new orientation of the magnetic moment with respect to the easy-axis of the ferromagnetic soft layer.
During a write process, all memory cells arranged in a first line will experience the same hard-axis field while all memory cells arranged in a second line perpendicular to the first line will experience the same easy-axis field. The strength of both magnetic fields must be chosen such that one of both fields alone is not able to switch a memory cell. Therefore, in an ideal memory array (i.e. all memory cells of the array show the same magnetic response to an applied magnetic field), only the memory cell which is located at the crossing of both lines experiences the hard-axis field as well as the easy-axis field and is therefore written. In contrast to the ferromagnetic soft layer, the ferromagnetic fixed layer has a coercivity that is high enough such that its magnetic moment is left unchanged in this process.
However, in an actual memory cell array, due to many factors related to manufacturing uncertainties and intrinsic magnetic variability, variations in the magnetic response throughout the memory cells in a memory cell array can be very large. Due to these variations, some of the memory cells may be written inadvertently if only one of the magnetic hard-axis field and the magnetic easy-axis field is applied. As a consequence, an array-wide selectivity of the writing process is generally not achieved. The response variations are, e.g., caused by tolerances during the manufacturing process, which for example may lead to differences in the surface roughness of different cells, having a consequent influence on the magnetic response of the cell.
In GB 2 343 308, a magnetic storage device is disclosed, which comprises a first and a second ferromagnetic layer and a tunnel barrier which is disposed between both ferromagnetic layers. The first ferromagnetic layer is a ferromagnetic fixed layer whereas the second ferromagnetic layer is a ferromagnetic soft layer which can change the orientation of its magnetic moment. The device can be written directly by applying a voltage across the cell which causes a tunnelling current to flow through the cell and can switch the orientation of the magnetic moment of the ferromagnetic soft layer with respect to the ferromagnetic fixed layer. The switching is effected by means of an induced exchange interaction between the ferromagnetic fixed layer and the ferromagnetic soft layer related to spin-polarised electrons tunnelling through the tunnelling barrier. Since the addressing of the cells in the write process is direct, array-wide selectivity is achieved.
In GB 2 343 308, it is important for the write process to supply a strong enough tunnelling current to overcome the coercive field of the ferromagnetic soft layer. Therefore, the tunnel barrier has to be very thin. Because the tunnelling current increases exponentially with decreasing thickness of the tunnelling layer, local variations due to the manufacturing process become particularly pronounced for thin barriers. The less uniform the current distribution within the cell, the higher the total current has to be to create a strong enough excitation throughout the entire ferromagnetic soft layer. However, a too strong a current will eventually break the tunnel junction. Therefore, in GB 2 343 308 materials for the tunnelling layer have been proposed with a low energy barrier. Nevertheless, from a manufacturing point of view, there is still a very strong dependence on the quality of the manufacturing process.
It is an objective of the present invention to provide a magnetic memory cell, a method of and a circuit for writing a magnetic memory cell, and a magnetic memory which are improved with respect to the above mentioned drawbacks. It is a further objective of the present invention to provide a method of writing a magnetic memory cell which helps to overcome the above mentioned drawbacks.
These objectives are achieved by a magnetic memory cell as claimed in claim 1, a magnetic memory as claimed in claim 17, a method of writing a magnetic memory as claimed in claim 23, and a memory circuit as claimed in claim 27.
According to a first aspect of the invention, a magnetic memory cell is provided which comprises:
a first stack of one or more conductive layers having at least one first magnetic layer with a first magnetic moment;
a second stack of one or more conductive layers having least one second magnetic layer with a second magnetic moment;
a third stack of one or more non-magnetic layers, that is arranged between and contacting said first and said second stacks and allows a non-tunneling current to pass,
a current control element allowing a current of up to at least a predetermined writing current amount to pass across the cell in a first direction perpendicular to the layer planes, and prohibiting a current to pass across the cell in a second direction opposite to said first direction, unless the current amount in the second direction is higher than a predetermined reading current amount, which reading current amount is lower than said writing amount, fn the memory cell of the invention, extensions of said layer stacks in a direction perpendicular to the layer planes, as well as the materials of said layer stacks are adapted to allow a change of an orientation of said first and second magnetic moments relative to each other with the aid of a current of at least said writing current amount, and to influence a current amount across the cell of at most said reading current amount by a giant magnetoresistance effect.
The invention is based on the idea that switching and reading the mutual orientation of the first and second magnetic moments can be improved if they do not rely on a voltage-driven tunneling current only.
The memory cell of the invention is designed to allow a current-driven switching of the orientation of the first and second magnetic moments relative to each other. For switching, a current is passed through the device. The orientation of the magnetic moment of the second magnetic layer relative to the magnetic moment of the first magnetic layer can be switched by sending a writing current amount in an appropriate direction through the device. The interaction of the charge carriers polarised by the first magnetic layer with the second magnetic layer is able to contribute to or effect alone a switching of the direction of the magnetic moment of the second magnetic layer, if the number of polarised charge carriers arriving at the second magnetic layer is high enough.
That means, in contrast to known MTJ memory cells the cell of the invention represents a low ohmic resistance in an electric circuit, such that a non-tunneling current may be led through the device at appropriate voltages during operation of the cell. However, this does not imply that the switching is necessarily based alone on the current passed through the cell. Embodiments of the invention which use other effects in addition to the current passed through the cell for switching the mentioned orientation will be described below. It is neither implied that there is no tunneling current at all involved in switching the device.
The memory cell of the invention has the advantage that the switching process has a xe2x80x9cdirectxe2x80x9d component. This means that an individual memory cell of the invention in an array of such memory cells may be addressed directly in the switching process, for instance by selectively sending a current through a respective pair of bit- and word-lines, and the memory cell itself. This aspect of the invention will be explained below in further detail.
Another important feature of the memory cell of the invention is the provision of a stack structure that leads to a giant magneto resistance effect. The giant magnetorestistance effect is primarily exploited in reading the state of the memory cell. The giant magneto resistance (GMR) effect is well known in the art. It is, in short, best described as a very large change in electrical resistance that is observed in a ferromagnet/paramagnet multilayer structure when the relative orientations of the magnetic moments in alternate ferromagnetic layers change as a function of an applied magnetic field. In the memory cell of the invention, it is the mutual orientation of the first and second magnetic moments that is responsible for the GMR effect. If both moments are in parallel alignment, the resistance is low. If both moments are in anti-parallel alignment, the resistance is high. It is, in general, well known in the art what materials and layer extensions have to be provided in order to have a GMR effect influence the current through the cell in a reading operation. Preferred embodiments will be described be row.
A further important aspect of the memory cell of the invention is the current control element. The current control element provides selectivity of addressing an inventive memory cell in an array of such memory cells. The current control element of the memory cell of the invention allows a current of up to at least a predetermined writing current amount to pass across, Le., through the cell in a first direction perpendicular to the layer planes. The writing current amount can be determined by methods known per se. It depends on the particular materials and cell structure chosen. The writing current amount provides a magnetic field component that, either alone or in synergy with further magnetic field components provided by further means described below, is able to switch the mutual orientation of the first and second moments. The writing current can be lead through the device in either direction. This is important, because the direction of the current determines the orientation of a magnetic field component caused by the current. In order to switch the orientation of the first and second magnetic moments, a current direction depending on the present state of the mutual orientation of the magnetic moments has to be chosen. The current direction can be chosen by applying an electric potential of appropriate sign across the cell in a respective direction perpendicular to the layer planes.
The current control device of the memory cell of the invention prohibits a current to pass across the cell in a second direction opposite to said first direction, unless the current amount in the second direction is higher than a predetermined reading current amount, which reading current amount is lower than said writing amount. This makes sure that reading the state of the memory cell, i.e., the mutual orientation of the first and second magnetic moments, is possible in only one current direction. As a current control element a Zener diode may for example be used.
The inventive magnetic memory cell acts as a spin valve. Charge carriers, usually electrons, which are sent through the first magnetic layer are spin polarised according to the direction of the magnetic moment of this layer. The spin polarised electrons can be conducted through the non-magnetic conductive layer stack to the second magnetic layer. If the magnetic moment of the second magnetic layer is in parallel orientation with respect to the magnetic moment of the first magnetic layer, the magnetoresistance of the device is low. If, on the other hand, the magnetic moment of the second magnetic layer is in anti-parallel orientation with respect to the magnetic moment of the first magnetic layer, the magneto resistance is high. The difference in the two resistances can be utilized in ascertaining the state of orientation of the second magnetic layer""s magnetic moment relative to the first magnetic layer""s magnetic moment, i.e., for reading the state of the cell. This relative orientation can for example be used for storing bits, with the parallel orientation representing a xe2x80x9c0xe2x80x9d and the anti-parallel orientation representing a logical xe2x80x9c1xe2x80x9d, or vice versa.
In the MTJ-device according to the prior art, the isolation layer sandwiched between the two magnetic layers has to be very thin in order to achieve a concentration of spin polarised charge carriers which is high enough for switching the device because the tunnelling current through the isolation layer decreases exponentially with increasing thickness of the layer. Therefore, either a high voltage has to be applied across device to allow for high enough tunnelling current or the tunnelling layer, i.e. the isolation layer, has to be very thin to allow the switching to occur.
In contrast thereto, in the inventive magnetic memory cell the resistance of the non-magnetic layer stack sandwiched between the magnetic layers shows only a linear or close to linear dependence on the layer thickness. Therefore, the thickness of this layer stack is much less critical than the thickness of the Insulation layer in an MTJ-device.
In the inventive memory cell, the thickness and/or the material of said third stack is/are chosen such as to prevent permanent coupling of the orientations of said first and second magnetic moments. In a device incorporating a giant magnetoresistance effect ferromagnetic or antiferromagnetic coupling occurs between the first and second stacks for certain thicknesses of the metallic layer stack sandwiched between the magnetic layers. For example, if the magnetic layers are made of cobalt and the non-magnetic layer stack is made of copper, an antiferromagnetic coupling occurs at a thickness of about 8 A and at a thickness of about 19 to 21 A, a ferromagnetic coupling Occurs at a copper thickness of about 10 to 15 A, and no coupling occurs at about 9 A and about 17 A Therefore, for copper as material of the third layer stack a thickness of about 9 A or about 17 A may be chosen, in principle. In fact, in a GMR-system several thickness of the sandwiched metallic layer exist which cause a coupling of the magnetic moments of the magnetic layers. However, the coupling gets weaker with increasing thickness of the conductive layer. Above a certain thickness, the coupling is negligible. Preferably the thickness of the non-magnetic conductive layers is above the certain thickness.
In the inventive magnetic memory cell, the first magnetic layer is in particular a ferromagnetic fixed layer, which can be fixed by providing a strong anisotropy, by an additional antiferromagnetic layer such as CoO, or by an artificial antiferromagnetic sandwich such as Co/Cu/Co where an antiferromagnetic coupling between the Go layers is established by choosing the thickness of the Cu of about 8 A or 19 to 21 A, and the second magnetic layer is in particular a ferromagnetic soft layer so that the orientation of the second magnetic layer""s magnetic moment is variable with respect to the first magnetic layers magnetic moment. The thickness of the ferromagnetic soft layer may be even less than 5 atomic layers but still thick enough not to become superparamagnetic. To increase the resistance of the ferromagnetic soft layer, a sandwich made of different soft ferromagnetic layers including ferromagnetic semiconductors or halfmetals may be used.
The extension perpendicular to the layer plane, hereinafter also referred to as the thickness, and/or the material of said first stack of layers is particularly chosen such that the electrons having passed through this stack are spin polarised to a predetermined degree and thickness and/or the material of said third stack of non-magnetic material is particularly chosen such that the spin polarisation is still recognisable at the location of the second magnetic layer. If the non-magnetic layer stack is too thick, the degree of polarization of the charge carriers decreases too much so that no switching of the ferromagnetic soft layer can be achieved. Therefore, a certain thickness of the non-magnetic layer should not be exceeded. For many materials the polarisation is still strong enough to switch the ferromagnetic soft layer at least until a thickness of about 80 to 100 nm. On the other hand, the thickness of said third layer, i.e. the non-magnetic conductive layer, should in particular be chosen such that no permanent coupling between the first and the second magnetic layers occurs. This aim can be achieved e.g. by choosing the thickness of the sandwiched metallic layer according to the principles outlined above. The third layer stack may preferably have a thickness between 3 and 20 nm, more preferably between 5 and 10 nm.
In the inventive magnetic memory cell, the first and third stacks of layers are arranged on a first side of said second stack of layers. In addition, the magnetic memory cell may comprise a fourth and a fifth stack of layers, which are both arranged at a second side of the second stack which lies opposite to the first side. The fourth stack is a stack of one or more conductive layers and comprises at least one third magnetic layer having a third magnetic moment which is aligned anti-parallel to said first magnetic moment. The third magnetic layer is in particular a ferromagnetic fixed layer, which Can be fixed according to the principles outlined above for the first magnetic layer. The fifth stack is a stack of one or more non-magnetic layers, that allow a current to pass, and separates said fourth stack from said second stack. The idea of providing said fourth stack of layers and said fifth stack of layers is also applicable to other kinds of magnetic memories. By providing the fourth and the fifth stacks, the spin polarisation of the charge carriers at the location of the second stack, in particular at the location of the second magnetic layer, can be enhanced.
If the magnetic moment of the first and the third magnetic layers are in antiparallel orientation, it is more difficult for the charge carriers which have been spin polarised by the first magnetic layer to pass the third magnetic layer so that many of them will be reflected. This reflection increases the number of spin polarised charge carriers at the location of the second magnetic layer.
The thickness and/or the material of said fifth stack is chosen such as to prevent from parallel or anti-parallel coupling of the orientations of said third and second magnetic moments. Further, the thickness and/or the material of said fifth stack is chosen such that the spin polarisation of the charge carriers reflected by said third magnetic layer does not affect the read process at low current levels but is still recognizable at the location of said second magnetic layer for strong currents during the write process. The thickness is therefore of the order of the spin-diffusion length for the material of said fifth stack, that is at least of the order of 100 nm for the example of Cu. Alternatively, a semi-conducting material can be used instead with a thickness of at least a few monolayers.
In an alternative embodiment of the present invention said fifth stack is replaced by a thin layer with a long spin diffusion length of at least a few monolayers thickness adjacent to the second magnetic layer followed by a layer with a short diffusion length and a thickness of the same order as its spin diffusion length.
In a similar manner, two or more magnetic memory cells according to the invention may be coupled in series being separated from each other by the fifth layer stack which forms a separation layer stack. Connecting the memory cells in series allows for averaging over parameter variations of the devices and for increasing the resistance of the device. In contrast to the MRAM cells of the state of the art, an averaging can be achieved without increasing the lateral dimensions of the device because the current for switching the state of the second magnetic layer as well as the current for reading the state of the second magnetic layer flows through the device. In prior art devices, a cell in which two or more devices are connected in series causes problems in writing the cell by means of a current passing by the cell due to the increased thickness of such a cell. On the other hand, in an MTJ-device where the write current passes through the device, connecting such devices in series would decrease the current passing through the devices because more than one tunneling process would be necessary.
According to claim 17, a magnetic memory is provided, comprising an array of inventive memory cells.
The inventive magnetic memory may comprise a flux return structure for closing the magnetic flux of a number of memory cells. Such a flux return structure reduces the stray fields of the magnetic layers. The flux return structure is not only applicable to magnetic memory cell but also to other kinds of magnetic memories.
In an inventive magnetic memory having at least a first row of memory cells, said flux return structure is designed and arranged such that the orientation of the magnetic moments of all first magnetic layers of said memory cells is the same throughout all memory cells which belong to the same row and that the orientation of the magnetic moments of all third magnetic layers is the same throughout all memory cells which are arranged in the same row. Further, the magnetic moments of said first and said third magnetic layers of the memory cells belonging to the same row are in anti-parallel alignment with respect to each other. The anti-parallel orientation is achieved if the first and third magnetic layers have different coercivities. Different coercivities can for example be provided by pinning first magnetic layers with an antiferromagnet, choosing different materials for the magnetic layers, or, if the magnetic layers are made of the same material by giving the magnetic layers different thickness.
To achieve the same orientation of all magnetic moments of said third magnetic layers throughout all memory cells belonging to a row, the respective magnetic layer may be a common layer for all these memory cells. Additional flux closure may be provided by introducing an electrically disjunct flex return layer between each cell in a row and at both ends of each row which may be for example an insulating soft magnetic ferrite. To lower the variability of the switching fields of the ferromagnetic soft layer during a write process, flux closure along the hard-axis direction may be provided by introducing a electrically disjunct keeper layer around two sides and on top of each cell which may be for example an insulating soft magnetic ferrite.
The principles of providing of flux closure described herein are not restricted to memories built up from giant magnetoresistance devices according to the present invention but are also applicable to memories built up from other magnetic memory devices.
According to the invention, a method of writing a memory cell in which data is stored in a magnetic storage layer having a magnetic moment, comprises the steps:
causing a flow of charge carriers through the memory cell by applying a voltage across the memory cell;
spin polarising the charge carriers by passing them through a magnetic layer having a magnetic moment with a defined orientation;
passing the spin polarised charge carriers through the magnetic storage layer and writing said magnetic storage layer with the aid of the interaction of the polarised charge carriers with said magnetic moment of said magnetic storage layer.
The method of the invention comprises at least one step of passing a support current by the location of the memory cell, said additional current generating a magnetic field that is adapted to support writing of the magnetic storage layer.
According to the method of the invention, the switching of the magnetic moment of a magnetic storage layer like, e.g., the second, that is the ferromagnetic soft magnetic layer of the memory cell of the invention, is achieved by two magnetic field components. One is generated by a spin polarised current led through the memory cell, the other is generated by a current led by the location of the memory cell. The first has been described above in the context of the memory cell of the invention and will be further explained with reference to the figures. The direction of the latter current has to be chosen to add to the field component of the first constructively, i.e., to enhance the total amplitude of the field, that is, increase the amount of the sum of both field components in the direction of the desired new orientation of the magnetic moment of the storage layer. It is noted that both field components are vectors and may in general have a non-vanishing amount in more than one direction. The direction of the field component maybe controlled by the direction of the current, which can be influenced by the direction of an electrical potential applied across the conductor carrying the current and its arrangement relative to the storage layer plane of the memory cell.
The conductor for leading by the current need not be contacting the memory cell. It may be at a distance from the memory cell. However, with increasing distance, the amplitude of the field component generated by the additional current at the position of the storage layer decreases, so that a higher current is needed to provide the same magnetic field component from a higher distance.
In a preferred embodiment of the invention said support current comprises a current impulse adapted to generate a hard-axis field component in the magnetic layer of the second stack for a predeterimed time span. In this embodiment, the support current provides a xe2x80x9ckickxe2x80x9d to the magnetic moment of the storage layer that effects a misalignment relative to a ferromagnetic fixed layer. After the impulse, the magnetic moment is neither parallel nor antiparallel. This makes it easier to complete the switching process using, e.g., the spin polarised current lead through the cell. Preferably, the current amount of said current impulse is adapted to create a magnetic filed lower than the coercive field of the storage layer.
However, in an alternative to this embodiment, the current amount of said current impulse is adapted to create a magnetic filed higher than the coercive field of the storage layer, but the time span the created field component is interacting with the magnetic moment of the storage layer is short enough not to write the magnetic storage layer by the support current impulse alone.
The spin polarisation of the charge carriers is achieved as described above by passing them through a polarisation layer, i.e. first magnetic layers. The orientation of the charge carriers"" spin polarisatian is determined by the direction of the flow of charge carriers through said polarisation layer together with the orientation of the polarisation layer""s magnetic moment. The orientation of the charge carriers"" spin polarisation is reversed by changing the direction of current flow. During a write process the density of polarised charge carriers at the location of the magnetic storage layer can be enhanced by not only passing the charge carriers through a polarisation layer before passing them through the magnetic storage layer but also passing the charge carriers through a further polarisation layer, which is oriented anti-parallel to the first polarization layer, after passing them through the magnetic storage layer.
According to a further aspect of the invention, a memory circuit is provided for writing a magnetic memory cell, in particular a memory cell according to any of the claims 1 to 16, comprising at least one bit line, at least one word line crossing the bit line, and at least one memory cell located at the crossing of the bit line and the word line and being connected between the bit line and the word line, wherein a bit line controller is connected to the bit line and a word line controller is connected to the word line, wherein the bit line controller provides at least a switching state for applying a sensing voltage Vs, a switching state for applying a positive reference voltage, and a switching state for applying negative reference voltage to the bit line, and wherein the word line controller provides at least a switching state for connecting a read out circuit, a switching state for applying the positive reference voltage, and a switching state for applying the negative reference voltage to the word line.
The bit line controller and the word line controller each may provide a switching state which provides an open circuit state of the respective one of the bit line and the word line.
As an option, the memory circuit may comprise a second bit line controller which is connected to the bit line and a second word line controller which is connected to the word line.
The second bit line controller provides a switching state for applying a second positive voltage which is less positive than the positive reference voltage by the amount of a difference voltage to the bit line, and a switching state for applying a second negative voltage which is less negative than the negative reference voltage by the amount of said difference voltage to the bit line.
The second word line controller provides a switching state for applying a third positive voltage which is more positive than the positive reference voltage by the amount of said difference voltage to the word line, and a switching state for applying a third negative voltage which is more negative than the negative reference voltage by the amount of said difference voltage to the word line.
In addition, the second bit line controller and the second word line controller each may provide a switching state which provides an open circuit of the respective one of the bit line and the word line.